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Department  Electronics Communication Engineering
Year 2nd year
Semester 3
University Anna University
Regulation  R2017
Subject Code EE6301
Subject Name Digital Logic Circuits
Download File EE6301 Digital Logic Circuits Lecture Notes, Books, Important 2 Marks Question and Answers, 16 Mark Question with Answers, Syllabus & Question Bank

 

 

EE6301 Digital Logic Circuits Syllabus

UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES
Review of number systems, binary codes, error detection and correction codes (Parity and Hamming code0- Digital Logic Families ,comparison of RTL, DTL, TTL, ECL and MOS families -operation, characteristics of digital logic family.

UNIT II COMBINATIONAL CIRCUITS
Combinational logic – representation of logic functions-SOP and POS forms, K-map representationsminimization using K maps – simplification and implementation of combinational logic – multiplexers and demultiplexers – code converters, adders, subtractors.

UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Sequential logic- SR, JK, D and T flip flops – level triggering and edge triggering – counters – asynchronous and synchronous type – Modulo counters – Shift registers -design of synchronous sequential circuits – Moore and Melay models – Counters, state diagram; state reduction; stateassignment.

UNIT IV AS YNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABLE LOGIC DEVICES Asynchronous sequential logic circuits-Transition table, flow table-race conditions, hazards &errors in digital circuits; analysis of asynchronous sequential logic circuits-introduction to Programmable Logic Devices: PROM – PLA –PAL.

UNIT V VHDL
RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flipflops, FSM, Multiplexers /Demultiplexers).

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