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Department  Electronics Communication Engineering
Year 4th Year
Semester 8th Semester
University Anna University
Regulation  R2017
Subject Code EC8007
Subject Name LOW POWER SoC DESIGN
Download File EC8007 LOW POWER SoC DESIGN Lecture Notes, Books, Important 2 Marks Question and Answers, 16 Mark Question with Answers, Syllabus & Question Bank

 

 

EC8007 LOW POWER SoC DESIGN Syllabus

UNIT I POWER CONSUMPTION IN CMOS
Physics of power dissipation in CMOS FET devices – Hierarchy of limits of power – Sources of power consumption – Static Power Dissipation, Active Power Dissipation – Designing for Low Power, Circuit Techniques for Leakage Power Reduction – Basic principle of low power design, Logic level power optimization – Circuit level low power design.

UNIT II SYSTEM-ON-CHIP DESIGN
System-on-Chip Concept, Design Principles in SoC Architecture, SoC Design Flow, Platform- based and IP based SoC Designs, Basic Concepts of Bus-Based Communication Architectures. High performance algorithms for ASICs/ SoCs as case studies – Canonic Signed Digit Arithmetic, KCM, Distributed Arithmetic, High performance digital filters for sigma-delta ADC

UNIT III POWER OPTIMIZATION OF COMBINATIONAL AND SEQUENTIAL LOGIC MACHINES FOR SOC
Introduction to Standard Cell-Based Layout – Simulation – Combinational Network Delay – Logic and interconnect Design – Power Optimization – Switch Logic Networks. Introduction – Latches and Flip-Flops – Sequential Systems and Clocking Disciplines – Sequential System Design – Power Optimization – Design Validation – Sequential Testing.

UNIT IV DESIGN OF LOW POWER CIRCUITS FOR SUB SYSTEM ON A SOC
Subsystem Design Principles – Combinational Shifters – Adders – ALUs – Multipliers – High Density Memory – Field Programmable Gate Arrays – Programmable Logic Arrays – Computer arithmetic techniques for low power system – low voltage low power static Random access and dynamic Random access memories, low power clock, Inter connect and layout design

UNIT V FLOOR PLANNING
Floor-planning Methods – Block Placement & Channel Definition – Global Routing – switchbox Routing – Power Distribution – Clock Distributions – Floor-planning Tips – Design Validation – Off- Chip Connections – Packages, The I/O Architecture – PAD Design

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